By Stefanos Kaxiras
Within the previous few years, strength dissipation has develop into a huge layout constraint, on par with functionality, within the layout of recent desktops. while long ago, the first task of the pc architect used to be to translate advancements in working frequency and transistor count number into functionality, now energy potency needs to be taken under consideration at each step of the layout technique. whereas for it slow, architects were winning in supplying forty% to 50% annual development in processor functionality, charges that have been formerly brushed off finally stuck up. the main serious of those bills is the inexorable bring up in energy dissipation and gear density in processors. energy dissipation concerns have catalyzed new subject components in computing device structure, leading to a considerable physique of labor on extra power-efficient architectures. energy dissipation coupled with diminishing functionality profits, was once additionally the most reason for the swap from single-core to multi-core architectures and a slowdown in frequency raise. This booklet goals to record essentially the most very important architectural concepts that have been invented, proposed, and utilized to lessen either dynamic strength and static energy dissipation in processors and reminiscence hierarchies. an important variety of options were proposed for a variety of occasions and this e-book synthesizes these recommendations through targeting their universal features.
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For example, subsequent work by Saputra et al. provided an exact mixed-integer linear programming (MILP) technique that can determine the appropriate (V , f ) setting for each loop nest [197]. An MILP approach is required because discrete (V , f ) settings lead to a non-convex optimization space. Their technique reports improvements in energy savings compared to prior work. However, it does not account for the energy penalties incurred by mode switching. Furthermore, the long runtimes of straightforward MILP approaches make their integration into a compiler somewhat undesirable.
Candidate regions are considered to be loop nests, call sites, called procedures, statement sequences (straight-line code), or even the entire program. Restricting regions to the above programming constructs has the benefit of making the number of DVFS switchings tractable, since the number of times such regions execute can be determined with reasonable accuracy either statically or by profiling. DVFS occurs only on entering and exiting a region. Finally, candidate regions are selected by size, so DVFS switchings occur only for significantly large pieces of code.
Since most real time systems are embedded systems with a wellunderstood workload, they can be designed (scheduled) to operate at an optimal frequency and voltage, consuming minimum energy while meeting all deadlines. An example would be a mobile handset running voice codecs. If the real-time workload is not mixed with non-real-time applications, then DVFS controlled by an on-line policy is probably not necessary—scheduling can be determined off-line. cls June 27, 2008 9:33 USING VOLTAGE AND FREQUENCY ADJUSTMENTS TO MANAGE DYNAMIC POWER 29 Flautner et al.